Senior FPGA Engineer II – Network

CesiumAstro•Westminster, CO

1d•$102,000 - $126,000

About The Position

At CesiumAstro , we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team. We are looking to add a Senior FPGA Engineer II - Network to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you. In this position, you will be responsible for FPGA designs and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in board-level hardware design is also desirable. The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.

Requirements

Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution.
Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems.
Production experience in design, implementation, and integration of OSI Layers 2 and 3 networking systems, including protocols such as Ethernet, IP, and MPLS.
Experience in networking system design, especially in determining throughput and memory requirements.
Expertise in writing and reviewing VHDL.
Proficiency in writing and reviewing SystemVerilog for block and system verification.
Expertise in FPGA design and verification tools for modern complex FPGA and SoC platforms such as Xilinx Vivado and Siemens Questa.
Excellent written and verbal communication skills.

Nice To Haves

Deep understanding of network design and an ability to derive requirements based on high-level objectives.
Familiarity with non-FPGA networking platforms including ASICs and general-purpose processors.
Aerospace design and qualification.
Worst-case analysis, failure method and criticality analyses, and reliability analysis.
Experience with board-level hardware design.
Familiarity with communications systems, such as digital signal processing.
Experience writing low-level software for interfacing to FPGA IP.

Responsibilities

FPGA designs and systems through all phases of the development process.
FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces.
Testing, validation, and verification will also be central tasks for any FPGA design.
Present engineering design review materials to our customers and executive team
Participate in proposal-writing efforts.