Senior Firmware Engineer - PCIe, Systems Engineering

Pure Storage•Santa Clara, CA

1d•$175,000 - $263,000•Onsite

About The Position

We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Join us as a Senior Firmware Engineer – PCIe and play a key role in shaping the future of data storage. You'll design and develop cutting-edge firmware for our DirectFlash™ SSD Modules, specializing in PCIe technologies. This role is a unique chance to work on groundbreaking hardware, collaborating with our hardware and software teams to create high-performance, resilient storage solutions that are foundational to our technology.

Requirements

Deep expertise in firmware development for embedded systems, with a strong understanding of PCIe architecture, protocols, and hardware/software interactions.
Proficiency in C/C++ and a demonstrated ability to use scripting languages like Python for test automation and tooling.
Hands-on experience with PCIe firmware development, including LTSSM bring-up and debugging, link training, error recovery, and register-level programming.
Proven track record of debugging and resolving complex issues across firmware, hardware, and driver boundaries.
Experience with hardware bring-up on new platforms and using PCIe compliance tools like protocol analyzers.

Responsibilities

Design and deliver high-performance firmware for DirectFlash™ SSD Modules, with a focus on PCIe functionality, including initialization, configuration, and runtime management.
Lead the bring-up and integration of new PCIe-based hardware, ensuring compliance with specifications and optimal link performance.
Develop and maintain key PCIe features, such as LTSSM, power management, hot-plug support, and robust error handling.
Debug complex, system-level issues at the intersection of firmware, drivers, and hardware, and build advanced diagnostics tools to support this effort.
Collaborate closely with hardware engineering teams on PCIe PHY integration, validation, and signal integrity considerations to ensure seamless hardware/firmware co-design.