Senior Engineer, Design Verification

Marvell Technology•Morrisville, NC

51d•Onsite

About The Position

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. As part of the Custom Compute & Storage Business unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help make each design meet our customers' specifications whether they're a major telecom organization or automotive company, etc In this in-office role in Morrisville NC, you'll work day to day with an RTL engineer to verify their design. Their design is in Verilog; you'll use System Verilog to debug. You'll run simulations using Synopsys VCS or a similar program, and then debug as needed until the design meets required specifications. You'll attend weekly staff meetings to go over what everyone is working on and update your progress or address any issues. As you take responsibility for larger blocks, you may have to present to a review committee and explain your test plan and test schedule for those larger blocks.

Requirements

Have completed a Bachelor's Degree in Electrical Engineering or Computer Engineering and have 2 to 3 years of related professional experience OR a Master's Degree and/or PhD in those fields.
Your coursework must have included some analog classes, Verilog or VHDL, basic circuits, and computer architecture. You should have a focus in VLSI and UVM verification or show projects in your courses that directly relate to chip design verification.
You have used a tool like Synopsys, Cadence, or Mentor to run simulations and you can write and debug a testbench.
Be comfortable working in a Linux environment and doing scripting with Python.
Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely.
Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from the planned schedule.