Senior Digital Design Engineer

Analog DevicesSanta Barbara, CA
12d

About The Position

Analog Devices is seeking a senior digital design engineer for its Data Center & Energy (DCE) group in beachside Santa Barbara, CA. Within DCE, we deliver high ‑ reliability power, connectivity, and analytics solutions for modern data centers and energy infrastructure. The successful candidate will implement and verify digital logic for mixed-signal SoCs that enable signal measurement and analytics. This role focuses on RTL development, verification, and integration, working closely with senior engineers and cross-functional teams to deliver robust, manufacturable solutions. This is a demanding multi-disciplinary position with unique growth potential. The group culture aims to foster a challenging, exciting, and supportive environment. The team members must be comfortable working on a wide variety of products and technologies in a fast-paced and agile environment. Analog Devices rewards performance, innovation, and collaboration.

Requirements

  • BS in Electrical or Computer Engineering (or equivalent)
  • 3 + years of experience in ASIC /SoC digital design
  • Proficiency in Verilog/ SystemVerilog and scripting languages (Python, C)
  • Familiarity with RTL-to-GDS flows (e.g., Genus, Innovus, Tempus, Conformal)
  • Understanding of DFT concepts and basic test strategies
  • Working knowledge of analog circuit operation and lab practices
  • Strong problem-solving skills and ability to work independently with minimal supervision
  • Good organization ; written and verbal communication skills

Nice To Haves

  • MS in Electrical or Computer Engineering (or equivalent)
  • Experience with FPGA prototyping and system-level modeling
  • Familiarity with power system components (VRMs, IBCs, BMCs) and board-level sequencing
  • Exposure to standard interfaces and bus protocols ( AMBA , I²C, SPI)
  • Interest in methodology improvements and automation

Responsibilities

  • Develop and verify RTL for digital blocks and subsystems; ensure functional correctness and timing closure
  • Perform synthesis, static timing analysis, and support design-for-test (DFT) insertion and pattern generation
  • Collaborate with analog, firmware, and validation teams to integrate digital content into mixed-signal SoCs
  • Assist with silicon bring-up and debug; support lab measurements and correlation to simulation
  • Contribute to methodology improvements and automation initiatives

Benefits

  • medical, vision and dental coverage
  • 401k
  • paid vacation, holidays, and sick time
  • discretionary performance-based bonus
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