Senior Design Verification Engineer (FC-TBD)

Cirrus LogicAustin, TX
22dHybrid

About The Position

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! Join our silicon design verification team and work closely with digital/analog designers, applications engineers, and embedded software developers, participating in all aspects of verification for complete mixed-signal IC developments of innovative solutions. You will work on complex verification systems and contribute to improvements in verification methodology while working alongside some of the most talented engineers in our industry.

Requirements

  • MS or PhD in Electrical Engineering or Computer Engineering.
  • At least 5+ years of experience in silicon design or verification.
  • Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM, OVM, AVM, Vera).
  • Strong knowledge base of digital design & systems architecture.

Nice To Haves

  • Able to work closely with digital/analog designers, applications engineers, and software to support both pre-silicon verification and post-silicon validation efforts.
  • Knowledge of signal processing and Verilog Assertions.
  • Ability to mentor junior engineers in verification methodology.

Responsibilities

  • Perform verification planning.
  • Testbench development using UVM methodologies.
  • Implement functional verification of mixed-signal ASICs.
  • Failure analysis and resolution, coverage analysis and population.
  • Digital/mixed-signal modeling.
  • Develop directed/constraint-random test generation, gate-simulations.
  • Regression debug support and other flow/infrastructure development.
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