Senior Design Verification Architect

Mediatek • San Jose, CA

3d • $190,000 - $270,000

About The Position

We are looking for an experienced senior design verification architect to lead verification strategy, methodology, and architecture for HPC SOCs, subsystems, and IP blocks. You will define end-to-end DV plans, guide teams to methodology and coverage goals, and ensure high-quality silicon through robust verification infrastructure.

Requirements

• Master's degree in Electical Engineering, Computer Engineering, or a related field.
• Experience with Formal Verification and assertion-based verification.
• Knowledge of Emulation and FPGA prototyping (Palladium, Zebu, Protium).
• Experience with RISC-V or ARM processor based subsystems.
• Familiar with SystemC or C/C++ co-simulation.
• Previous experience in a technical leadership or architect role.
• Enthusiastic with AI-driven verification and familiar with using AI to optimize regression and coverage closure.

Responsibilities

• Verification strategy and architecture: Define and document the global verification strategy, testbench architecture, and methodologies.
• Methdology leadership: Drive the adoption of industry-standard methodologies and best practices to maximuze verification efficiency and reuse.
• AI workload verification: Develop strategies to verifyplex dataflow architectures using real world AI workloads.
• Cross-functional collaboration: Work closely with RTL designers, system architects, and firmware engineers to identify edge cases and resolveplex hardware bugs.

Benefits

• Employee may be eligible for performance bonus, short and long term incentive programs.
• MediaTek provides a variety of benefits includingprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Number of Employees: 5,001-10,000 employees