Senior ASIC Design Engineer

NVIDIA • Us, CA

1d • Hybrid

About The Position

We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing! What you'll be doing: As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. Analyze architectural trade-offs based on features, performance requirements and system limitations. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines. Architect features to help silicon debug and support post-silicon validation activities.

Requirements

• Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science.
• 8+ years of meaningful work experience.
• Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches.
• Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
• Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.
• Strong interpersonal skills and an excellent teammate.

Nice To Haves

• Strong C/C++, Python or Perl skills.
• Good debugging and analytical skills.

Responsibilities

• Implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
• Analyze architectural trade-offs based on features, performance requirements and system limitations.
• Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
• Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
• Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines.
• Architect features to help silicon debug and support post-silicon validation activities.

Benefits

• You will also be eligible for equity and benefits .
• Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees