About The Position

Complete circuit simulations using industry‑standard tools such as SPICE and VERILOG. Assist with verification and development of schematic blocks including memory array, control logic, address decode, data path, and internal test logic. Import layout parasitic information, interpret device specifications, and produce corresponding circuit verification patterns. Contribute to test chip definition, silicon validation planning, and verification documentation. Collaborate with global teams to develop best‑known verification practices and support modeling, characterization, and extracted netlist generation.

Requirements

  • Bachelor's degree in Electrical Engineering or Computer Engineering.
  • Understanding of memory applications and CMOS fundamentals.
  • Experience with circuit simulation setup, analysis, and debug.
  • Strong written and verbal communication skills with the ability to convey complex technical concepts.

Nice To Haves

  • Experience in memory circuit design and performance optimization.
  • Familiarity with RTL, Static Timing Analysis (STA), Python, and HSPICE.
  • Demonstrated motivation to expand technical breadth and depth within collaborative global teams.

Responsibilities

  • Complete circuit simulations using industry‑standard tools such as SPICE and VERILOG.
  • Assist with verification and development of schematic blocks including memory array, control logic, address decode, data path, and internal test logic.
  • Import layout parasitic information, interpret device specifications, and produce corresponding circuit verification patterns.
  • Contribute to test chip definition, silicon validation planning, and verification documentation.
  • Collaborate with global teams to develop best‑known verification practices and support modeling, characterization, and extracted netlist generation.
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