RISC-V CPU Microarchitecture / RTL Intern

Tenstorrent University JobsSanta Clara, CA
6hOnsite

About The Position

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re building the future of AI hardware and software by developing next-generation compute through innovative CPU and AI architectures. This internship gives students a hands-on opportunity to work on a high-performance RISC-V processor and gain practical experience in CPU design. As part of our CPU design team, the intern will contribute directly to advancing state-of-the-art CPU technology while learning from experienced engineers across architecture, RTL, and verification. This role is on-site based out of Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Requirements

  • Enrolled in a Master’s or PhD program in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Proficiency in hardware description languages such as Verilog, SystemVerilog, or VHDL.
  • Understanding of RISC-V architecture and CPU microarchitecture concepts.

Responsibilities

  • Design and verify RTL components for next-generation RISC-V CPU cores.
  • Collaborate on developing and refining verification environments to ensure high-quality design outcomes.
  • Optimize RTL for performance, power, and area (PPA) trade-offs.
  • Explore and apply AI-assisted design tools to accelerate the CPU design process.
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