RET - OPC Validation Engineer (BEOL Retargeting)

Texas Instruments•Dallas, TX

About The Position

Change the world. Love your job. Texas Instruments is in an exciting era of growth and innovation, and our Advanced Technology Development (ATD) organization is at the center of it, developing the 28nm process technologies that will define TI’s next generation of analog and embedded processing capabilities. As part of ATD, you won’t just support production, you’ll create the technology that makes it possible. Our engineers are working at the leading edge of computational lithography, Resolution Enhancement Techniques, and advanced process integration, solving the fundamental patterning and process challenges that determine whether a 28nm technology can be manufactured at scale and at yield. The work done in ATD directly enables fabs that will manufacture tens of millions of analog and embedded processing chips every day which will be supporting customer demand for decades to come. We’re committed to responsible, sustainable semiconductor manufacturing and to building a diverse, technically excellent team that drives meaningful impact across the industry. In this role, you’ll work at the intersection of fundamental research and high-volume manufacturing, turning process innovations into production-ready technologies that power electronics everywhere. TI’s 28nm technology ramp at LFAB depends on a continuous flow of qualified, production-ready OPC recipes and that qualification process only works when someone owns it with rigor and authority. As a RET OPC Validation Engineer in ATD, you will be the critical gatekeeper for OPC recipe releases. You own the validation methodology, you make the accept/reject call on recipe updates, and you drive failures through to root cause and resolution. You’ll design test structures, orchestrate wafer measurement execution across Fab teams, compile and interpret SEM data at scale, and build a systematic library of lithographic hotspots that strengthens validation coverage over time. Your technical judgment directly determines the patterning reliability and yield performance of TI’s most advanced analog products.

Requirements

Master’s in Electrical Engineering, Physics, Computer Science, Chemistry, or related field
8+ years in semiconductor photolithography and/or OPC development
Experience with 28nm or advanced CMOS planar technology
Python proficiency; experience with large-scale data analysis

Nice To Haves

Ability to develop OPC models and recipes, not just validate them
Experience with retarget rule setup and DFM/pattern matching
GDSII/OASIS layout editing and creation
Spotfire/JMP for reporting; Jira experience

Responsibilities

Own OPC recipe validation on specific product designs: Review wafer data from the Fab team and provide structured, actionable feedback to the OPC team
Design layout validation structures in collaboration with Process Engineers
Coordinate measurement execution with Metrology for validation structures
Compile and analyze SEM wafer-image data for OPC engineer review
Build and maintain a curated library of lithography hotspots for ongoing validation coverage
Own the OPC recipe release process: Design and execute recipe test plans with recipe engineers
Accept or reject recipe updates based on test outcomes
Triage test failures and lead structured improvement plans to closure
Release recipes to production following team review of test results
Ensure recipe writers have followed approved testing procedures throughout