THE OPPORTUNITY The Intern – FPGA/RTL Design Engineer will report to the Senior Engineering heading our Irvine Engineering team with dotted line reporting to Technology Director, Wireless Systems. The successful individual in this role will learn and participate in the development of Silvus advanced research projects and will contribute to the efficient implementation of novel signal processing algorithms for Silvus MIMO wireless networking products. These are exciting projects aimed at addressing challenging real-world communication needs. This internship is full-time, fully onsite, Monday through Friday, at Silvus Technologies’ Irvine office in the heart of Irvine near the vibrant Irvine Spectrum. The following is a list of at least some of the current essential job functions of this internship opportunity.
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Job Type
Full-time
Career Level
Intern