Principal RFIC Design Engineer

Western DigitalSan Jose, CA
10hOnsite

About The Position

ESSENTIAL DUTIES AND RESPONSIBILITIES: Designer will be responsible for the design of high performance RF and analog circuit blocks. Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation. Job responsibilities require ability to communicate at all levels and with cross functional groups. Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept criticism.

Requirements

  • Must have hands-on design and development experience in RF and analog integrated circuit
  • Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Baseband amplifiers, low noise RF amplifiers, wide bandwidth amplifiers Mixers, up-converters, down-converters High speed drivers and receivers, CDR circuits, equalizers Power amplifiers
  • Must have experience in 40nm and below CMOS technology
  • Must have a demonstrable track record of successful design releases and mass production
  • Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.)
  • Experience with RF and high performance analog block layout such as LNA, mixer, analog to digital converters, references, digital to analog converters etc.
  • Experience with floor planning, block level routing and top level chip routing
  • Knowledge of high performance analog layout considerations such as matching, EM-IR and SOA and mitigation techniques
  • Must possess strong written and verbal communication skills
  • BS, MS or PhD with relevant experience

Nice To Haves

  • Experience working with distributed design teams a plus
  • Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept criticism.

Responsibilities

  • design of high performance RF and analog circuit blocks
  • transistor level, block level and module level circuit architecture, design, simulation, optimization
  • layout supervision, layout verification
  • preparation of test plan for the testing team
  • reliability and yield assessment and modeling
  • simulation to bench and bench to test correlation
  • bench evaluation both at silicon level and at applications level
  • documentation
  • communicate at all levels and with cross functional groups
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