RFIC Layout Engineer

AppleSan Diego, CA
4d

About The Position

As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes.

Requirements

  • BS and 10+ years of relevant industry experience.
  • FinFet experience.

Nice To Haves

  • Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS.
  • Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing.
  • Solid understanding of RC delay, electromigration, and coupling.
  • Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE.
  • High level proficiency in interpretation of CALIBRE DRC, ERC, LVS in FinFet Technology.
  • Knowledge of CADENCE layout tools.
  • Excellent communication skills.
  • Scripting skills in PERL or SKILL.
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