Principal Fuse/JTAG Design Lead

ARMChandler, AZ
37d

About The Position

Our Solution Engineering division develops SoCs for various application segments, using the latest IP products from Arm and other vendors. We are looking for a creative and hard-working SoC Lead Design Engineer to lead the team responsible for the development of the JTAG and Fuse Subsystems! The successful candidate will own the Microarchitectural Specifications, lead other designers and partner with the verification lead/team across multiple process nodes and product families. You will join a team of dedicated engineers, collaborating with multiple other groups inside of Arm to design the scalable and reusable Debug Control and Access IPs! Responsibilities: As a lead design engineer with a knowledge of subsystems and SoCs you will be leading an IP development team which owns our reconfigurable Fuse and JTAG Subsystems. Work with the Architect(s) to understand Subsystem requirements, and develop the design specifications which meet the quality, reliability, manufacturing and reconfigurable needs across multiple SoC's. Your key technical responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints. Your key leadership responsibilities will include technical guidance and mentorship of the design team, engaging with partner teams for collaborative improvements in tools, technologies, methodologies, and capabilities. Partner with the verification lead to review test plans and help debug design issues in addition to crafting UVM components for IP and SoC integration of the Subsystems As lead of the design team, you will drive unification and efficient methods, as well as drive new methodologies used by the team Act as 1-Arm ensuring the best solutions are what Arm uses. Required to work with Project Management to define plans and execute schedules flawlessly.

Requirements

  • Bachelors or Master's degree in Computer Science or Electrical/Computer Engineering or a similar related field and 15+ years' experience working in design of complex subsystems or SoCs
  • Experience in digital hardware design for complex systems using System Verilog
  • Experience with working with analog hard IP integration, timing diagrams, BMODs
  • Experience with reconfigurable IP / Subsystem design
  • Experience with power and clock domain crossing
  • Experience with static design checks like linting, CDC/RDC, X-propagation
  • Experience with all stages of design: initial concept, specification, implementation, testing, documentation and support
  • Experience collaborating with the verification team on design quality closure
  • Experience with Perl, Python or other scripting language
  • Leadership, mentoring or coaching experience

Nice To Haves

  • Experience with ARM-based designs and/or ARM System Architectures
  • Experience developing designs for OTP/Fuse usage models and JTAG/TAP protocols
  • Experience with SoC system use cases and debug methodologies
  • Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
  • Experience with DFT use cases and methodologies: RTL testability, scan insertion, OCC

Responsibilities

  • leading an IP development team which owns our reconfigurable Fuse and JTAG Subsystems
  • Work with the Architect(s) to understand Subsystem requirements, and develop the design specifications which meet the quality, reliability, manufacturing and reconfigurable needs across multiple SoC's
  • crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints
  • technical guidance and mentorship of the design team, engaging with partner teams for collaborative improvements in tools, technologies, methodologies, and capabilities
  • Partner with the verification lead to review test plans and help debug design issues in addition to crafting UVM components for IP and SoC integration of the Subsystems
  • drive unification and efficient methods, as well as drive new methodologies used by the team
  • Act as 1-Arm ensuring the best solutions are what Arm uses
  • Required to work with Project Management to define plans and execute schedules flawlessly.
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