Principal Engineer, HBM Verification Architecture

Micron Technology•Richardson, TX

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG), part of the Technology and Products Group (TPG), builds industry‑leading High Bandwidth Memory (HBM) solutions that power AI and machine learning platforms. By stacking multiple DRAM dies with an integrated logic controller using Through‑Silicon Via (TSV) technology, we deliver breakthrough gains in memory density, bandwidth, and energy efficiency. We are seeking a Principal Verification Architect to define and drive the verification strategy for Micron’s HBM portfolio—spanning IP and system‑on‑chip (SoC) levels—while shaping technical direction, influencing roadmaps, and enabling the lowest power‑per‑bit solutions in the industry.

Requirements

Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
12+ years of relevant verification engineering experience, including leading verification strategy from concept through execution.
10+ years of experience in digital (Verilog), analog (FastSpice), or mixed-signal verification, including co-simulation or real-number modeling.
8+ years of experience with custom design verification or register-transfer level (RTL) design verification flows.

Nice To Haves

Master’s degree or PhD in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
16+ years of relevant verification engineering experience, including defining or rebuilding verification flows used as organizational standards.
Experience with memory products based on JEDEC (Joint Electron Device Engineering Council) specifications, including the HBM product family.
Deep understanding of pre-silicon verification from design kickoff through tapeout and memory subsystem operation in high-performance computing (HPC) applications.

Responsibilities

Define and manage the end-to-end verification architecture at both intellectual property (IP) and system-on-chip (SoC) levels. This covers current and upcoming memory solutions with High Bandwidth Memory technology.
Lead complex, multi-functional verification initiatives spanning design engineering, product engineering, business units, and external customer teams.
Serve as the technical authority on verification methodology, advising senior leadership on architectural direction, trade-offs, and long-term strategy.
Drive system-level co-verification with customers, aligning customer verification approaches with Micron’s HBM roadmap and platform requirements.
Establish verification standards, protocols, and reference architectures adopted across IP and SoC verification teams.
Architect next-generation verification solutions informed by customer needs, architecture roadmaps, and industry trends, including generative artificial intelligence (GenAI) applications.
Mentor and develop senior and staff engineers while leading root-cause analysis of the most complex pre-silicon and post-silicon issues to prevent recurrence across product families.

Benefits

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.
Additionally, Micron benefits include a robust paid time-off program and paid holidays.
For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

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