Principal Engineer, Design Verification (NPU)

Cariad, Inc.•Mountain View, CA

2d•Hybrid

About The Position

We are CARIAD, an automotive software development team with the Volkswagen Group. Our mission is to make the automotive experience safer, more sustainable, more comfortable, more digital, and more fun. To achieve that we are building the leading tech stack for the automotive industry and creating a unified software platform for over 10 million new vehicles per year. We’re looking for talented, digital minds like you to help us create code that moves the world. Together with you, we’ll build outstanding digital experiences and products for all Volkswagen Group brands that will transform mobility. Join us as we shape the future of the car and everyone around it. Role Summary: The Principal Design Verification Engineer, within the NPU Hardware & Software organization, is intended for an individual with a broad background in design verification and complex digital system validation, with significant experience in AI accelerator verification and automotive safety standards. This role is responsible for driving the verification excellence of CARIAD’s state-of-the-art Neural Processing Unit (NPU), including the development of comprehensive testbenches and validation methodologies that ensure the NPU meets the highest standards of functional correctness and performance. In addition, the role is responsible for spearheading the development of verification infrastructure, including the creation of scalable regression frameworks and coverage-driven methodologies to deliver a high-quality, safety-critical NPU that meets automotive industry requirements.

Requirements

Expert communicator across global, cross-cultural, and cross-functional teams.
Strong analytical, debugging, and system-level problem-solving skills.
Proven ability to lead complex technical initiatives without direct authority.
Quality-driven mindset with a strong focus on correctness, robustness, and coverage.
Collaborative approach across hardware, software, verification, and safety organizations.
Expert SystemVerilog and UVM-based verification
Coverage-driven, constrained-random, and formal verification
Verification of AI accelerators, NPUs, and complex digital subsystems
AXI4/AHB protocol and memory subsystem verification
Verification automation using Python/Perl
FPGA prototyping and emulation-based validation
12+ years applying advanced verification and hardware engineering expertise on complex digital systems, including AI accelerators and safety-critical designs.
Bachelor’s degree in Electrical Engineering or Computer Engineering.

Nice To Haves

Automotive functional safety (ISO 26262)
Power-aware and low-power verification techniques
GenAI-assisted verification workflows
Master’s degree in Electrical Engineering or Computer Engineering.

Responsibilities

Develop comprehensive verification plans and test plans for NPU functional blocks and system-level integration
Define verification milestones, coverage goals, and success criteria aligned with project requirements
Create verification strategies for AI-specific workloads including convolution engines, matrix multiply units, and activation functions
Design and implement System Verilog/UVM testbenches for complex NPU verification
Develop constrained random test generators for neural network inference pipelines
Create reference models and checkers for AI workload validation
Build verification environments for memory subsystems, DMA controllers, and system interconnects
Implement functional and code coverage collection and analysis methodologies
Verify AXI4/AHB protocol compliance and system-level interfaces
Validate timing, throughput, and power consumption requirements
Develop and maintain regression test suites for continuous integration
Collaborate with software teams on hardware-software co-verification
Support FPGA prototyping and emulation platforms for system validation
Ensure compliance with automotive safety standards (ISO 26262) and functional safety requirements