Principal Engineer-Analog Design RF

Microchip • San Diego, CA

13d • $75,000 - $232,000

About The Position

We are looking for an experienced, hands-on RFIC Design Engineer with a strong background in RF CMOS design to join our Wireless IP Design Group. In this role, you will be responsible for the design of key RF blocks for Bluetooth, Wi-Fi, UWB, and other wireless products. You will work closely with a cross-functional global team in a highly collaborative environment that we truly take pride in.

Requirements

• Ph.D. in Electrical Engineering (or related field) with 5+ years of industry experience in RF/Analog CMOS IC design, or M.S. with 7.5+ years experience.
• Experience in RF TX/RX chain design and/or RF PLL/Synthesizer design.
• Deep understanding of RF-Analog IC design and extensive product level tape-out experience.
• Deep understanding of CMOS transistors and inductor physics including: noise, linearity, and device non-idealities, parasitic, on-chip matching networks.
• Deep understanding of IC layout and packaging effects on circuit performance including: p arasitic, cross-talk, supply/ground/substrate noise coupling, isolation techniques.
• Experience in IC test and debug, including hands-on work with RF lab equipment (spectrum/network analyzers, signal generators, oscilloscopes, etc.).
• Proficiency with industry-standard design tools, including: Cadence Virtuoso, Spectre / SpectreRF, PeakView or similar EM tools for passive/inductor/package modeling.

Responsibilities

• Design RFIC blocks and module including RF Synthesizer, VCO, LO generation, Transmitter and Receiver chains (LNA, mixer, PA, PA driver), baseband blocks, biasing, etc.
• Own schematic design and simulation to meet performance, area, power targets.
• Supervise and review layout, c lose collaboration with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies.
• Work with system design team to translate top-level radio and product requirements into detailed block-level budgets and circuit specifications.
• Supervise validation and d ebug as needed, including lab bring up, bench measurement, correlation to simulations, and root-cause analysis of silicon issues.
• Collaborate with foundry technology team to ensure proper use of PDKs and models, and to understand and leverage transistor and passive device models and reliability constraints.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments.
• In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
• Find more information about all our benefits at the link below: Benefits of working at Microchip
• The annual base salary range for this position, which could be performed in California, is $75,000-$232,000.
• Range is dependent on numerous factors including job location, skills and experience.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: Ph.D. or professional degree
• Number of Employees: 5,001-10,000 employees