Principal Digital Circuit Designer

Micron Technology • San Jose, CA

10d

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal High-speed Digital Circuit Designer – Interface Pathfinding At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team serves as a link between corporate strategy and engineering execution through forward-looking investigation and development of energy-efficient bandwidth solutions that support sustained technology leadership. As such, team members are expected to proactively identify, evaluate, and drive performance-scaling opportunities through innovative circuit, signaling, encoding, packaging, and interconnect solutions with a 3-5 year outlook, and to develop a robust intellectual property portfolio around these efforts. These objectives are achieved within a culture of diligent, continuous learning. The candidate is encouraged to contribute to Micron’s performance scaling strategies through: Evaluating and developing novel and literature-inspired high-speed circuit concepts, and preparing promising solutions for future product adoption Realizing return on investment through focused handshaking of new concepts with product teams Exploring opportunities to fully exploit future CMOS nodes Co-developing new Design-for-Test (DFT) and in-situ characterization capabilities Deriving and incorporating new circuit analysis techniques to support enhanced performance characterization Developing scripts or agents to automate and optimize design tool flows Driving circuit preparation to capitalize on test-chip opportunities, including: Designing and developing high-speed PHY components including signal paths, calibration, training, control, and test logic Converting architectural specification into micro-architecture and implementing RTL using Verilog/SystemVerilog Simulating, optimizing, and floor-planning digital circuits for silicon Performing formal/functional verification and partnering with pre- and post-silicon teams to debug and resolve issues The role encourages engagement across multiple fields and organizations including Signal Integrity, Circuit and Chip Build, Packaging R&D, and System Integration.

Requirements

• MSEE or higher with 10+ years of relevant digital design experience
• Strong RTL design skills using Verilog/SystemVerilog and ability to create detailed circuit specifications
• Proven understanding of timing, area, power, and complexity tradeoffs
• Experience with synthesis, STA, lint, CDC, and formal/functional verification tools
• Proficiency with scripting languages such as c-shell, Python, Perl, or TCL
• Strong interest in applying AI principles to elevate individual and team efficiency
• Experience with end-to-end design flow and demonstrated success taking circuits from conception through layout / tape-out and into high volume production
• Pro-active – Candidate will be expected to identify gaps and opportunities and address them with minimal supervision.
• Visionary – Candidate will be expected to think “outside-the-box” and yet offer innovative solutions within a set of practical constraints.
• Communicator – Candidate should be able to clearly convey necessary details of complex issues and corresponding solutions in both written and verbal formats.
• Collaborator – Candidate should be able to work collaboratively within the larger pathfinding team.

Responsibilities

• Evaluating and developing novel and literature-inspired high-speed circuit concepts, and preparing promising solutions for future product adoption
• Realizing return on investment through focused handshaking of new concepts with product teams
• Exploring opportunities to fully exploit future CMOS nodes
• Co-developing new Design-for-Test (DFT) and in-situ characterization capabilities
• Deriving and incorporating new circuit analysis techniques to support enhanced performance characterization
• Developing scripts or agents to automate and optimize design tool flows
• Driving circuit preparation to capitalize on test-chip opportunities, including: Designing and developing high-speed PHY components including signal paths, calibration, training, control, and test logic
• Converting architectural specification into micro-architecture and implementing RTL using Verilog/SystemVerilog
• Simulating, optimizing, and floor-planning digital circuits for silicon
• Performing formal/functional verification and partnering with pre- and post-silicon teams to debug and resolve issues

Benefits

• medical
• dental
• vision plans
• programs that help protect your income if you are unable to work due to illness or injury
• paid family leave
• robust paid time-off program
• paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal