Principal Analog Design Engineer

Neurophos•Austin, TX

58d•Onsite

About The Position

At Neurophos, listed as one of EE Times’ 2025 100 Most Promising Start-ups, we are revolutionizing AI computation with the world’s first metamaterial-based optical computing platform. Our design addresses the traditional shortcoming of silicon photonics for inference and provides an unprecedented AI engine with substantially higher throughput and efficiency than any existing solution. We've created an optical metasurface with 10,000x the density of traditional silicon photonics modulators. This enables a solution with 100x gains in power efficiency for neural network computing without sacrificing throughput; we've made improvements there, too. By integrating metamaterials with conventional optoelectronics, our compute-in-memory optical system surpasses existing solutions by a wide margin and enables truly high-performance and cost-effective AI compute. Join us to shape the future of optical computing. Location: Austin, TX or San Francisco, CA. Full-time onsite position. Reports To: Senior Director of Analog Position Overview: We are seeking a seasoned Principal Analog Design Engineer to play a vital role in developing cutting-edge full-custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. You will be responsible for the full lifecycle of analog blocks, from specification and architecture down to tape-out-ready layout. Success in this role requires a deep understanding of transistor-level circuit design, linearity, noise performance, and signal integrity in CMOS processes up to GHz speeds. If you possess a proven track record of designing robust, ultra-fast analog circuits and are eager to work at the intersection of electronics and photonics, you will make a defining impact on the future of optical computing.

Requirements

MS or PhD in Electrical Engineering.
10+ years of professional experience in full-custom analog integrated circuit design, 5+ years of dedicated experience in either GHz-speed RF or GHz-speed broadband analog design.
Demonstrated expert proficiency in the Cadence tool suite, specifically Virtuoso schematic, simulation, and custom layout.
Deep understanding of semiconductor device physics, linearity, noise analysis, and high-frequency circuit theory.
Proven track record of taking high-speed analog blocks from concept to mass production (successful tape-outs).

Nice To Haves

A background in photonic transceivers or optical communication electronics (e.g., experience with drivers for modulators, TIAs for photodetectors
Experience designing high-speed power amplifiers (PAs).
Proficiency in electromagnetic simulation tools such as EMX or HFSS.
Experience with frequency domain simulation in Spectre RF.

Responsibilities

Design, simulate, and verify high-speed analog circuits, such as drivers and transimpedance amplifiers, in deep sub-micron CMOS technologies.
Define architecture and specifications for electronic blocks based on system-level requirements.
Perform full-custom schematic capture, advanced analog simulations, and complete physical layout, including DRC/LVS, of critical analog blocks using Cadence Virtuoso.
Ensure rigorous signal integrity and power integrity across all high-speed interconnects.
Conduct post-layout extraction and simulation to validate performance against parasitic effects.
Collaborate closely with the Photonics and Digital teams to optimize the electro-optic interface, maximizing performance across the combination of disciplines.