Analog Design Engineer
About The Position
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso; Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso; Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC check by using Siemens Calibre; Perform whole chip IR drop check by using Ansys Totem; Conduct script modification using Perl programming language; Collaborate with Digital Engineer to define and design the analog to digital interface; Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors; Analyze project-specific specifications, such as speed, linearity, noise, power consumption, etc, and improve circuit designs or implement innovative solutions to meet performance requirements; Define corners based on chip operating conditions, ensuring the chip meets specifications and operates reliably with sufficient margin for robustness under all conditions; Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology.
Requirements
- Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields. Require coursework in Analog Integrated Circuit and Power Electronics Design.
- Analyze analog and mixed-signal circuits; troubleshoot and resolve circuit issues
- Design analog/mixed-signal circuits based on specifications; optimize for higher performance
- Perform circuit simulations using tools such as Cadence Spectre or HSPICE
- Understand layout impact on circuit performance; apply layout strategies to minimize adverse effects
- Knowledge of semiconductor device physics and its influence on circuit behavior
- Analyze and mitigate thermal, flicker, and shot noise in analog designs
- Knowledge of integrated circuit fabrication processes and incorporating process variation considerations into schematic and layout design.
- Design and analyze power management circuits, including LDOs and charge pumps.
Responsibilities
- Conduct design and development of image sensor technologies
- Work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso
- Work on whole chip floorplan design and pad frame
- Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array
- Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso
- Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice
- Perform design verification such as DRC, LVS, PERC check by using Siemens Calibre
- Perform whole chip IR drop check by using Ansys Totem
- Conduct script modification using Perl programming language
- Collaborate with Digital Engineer to define and design the analog to digital interface
- Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors
- Analyze project-specific specifications, such as speed, linearity, noise, power consumption, etc, and improve circuit designs or implement innovative solutions to meet performance requirements
- Define corners based on chip operating conditions, ensuring the chip meets specifications and operates reliably with sufficient margin for robustness under all conditions
- Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
