Physical Design Engineer Intern - Master's Degree

Marvell Technology•Morrisville, NC

2d•$34 - $68

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Central Cad And Design Services (CCDS) Physical Design team at Marvell is seeking candidates for a Physical Design engineering intern position. Projects within CCDS range from artificial intelligence and machine learning to wired and wireless infrastructure, with the latest technology nodes. The team utilizes the latest EDA software tools and works through the technical challenges to ensure we meet the performance, power, and area requirements of the design. This position will work in tandem with the other Physical Design related teams, such as Timing, Physical Verification, Power Integrity. What You Can Expect If chosen as an intern at the Morrisville, NC site, you will be immersed into the Semiconductor Physical Design process, working with Place+Route and Timing Analysis teams. Depending on your previous Physical Design experience, the team will customize your experience to learn and grow these skills. For less experienced interns, you will be giving training on the Physical Design Flow, and assigned an appropriate project to utilize those new skills. For more experienced interns, we will enhance your current knowledge on Physical Design, and be given a challenging assignment and project with possible product block implementation. Focus will be on RTL-to-Oasis and could be any part of floorplanning, synthesis, place and route, clock insertion, timing closure, electromigration, multi-voltage UPF analysis, formal equivalency checking, and physical verification. Utilize industry standard EDA tools from Cadence, Synopsys, and Siemens Write scripts in Python, TCL, Perl, UNIX Shell to aid design and development activities, including flow enhancement or development. An engineering mentor and a manager will be assigned to your internship to help guide you during your time on the team. Participate with other Marvell interns onsite, and the around the globe in a variety of activities.

Requirements

Candidate MUST be currently pursuing a BS/MS degree in EE/CS or related technical field(s)
No previous physical design experience is necessary
Experience working in a Unix type environment
Scripting skills in Python, TCL, and shell
Great problem solving and critical thinking skills
Detail oriented and self-motivated team worker with good verbal and written communication skills

Nice To Haves

Relevant classes, such as Digital Systems, Microelectronics, VLSI Designs, or other semiconductor related coursework
Understanding of Verilog or System Verilog
Understanding of semiconductor physics, particularly with deep sub-micron technologies
Previous experience in Physical Design and Static Timing Analysis implementation and flows, including Floorplanning, Synthesis, Place and Route, Formal Equivalence Checking, Power Integrity, and Physical Verification

Responsibilities

Focus will be on RTL-to-Oasis and could be any part of floorplanning, synthesis, place and route, clock insertion, timing closure, electromigration, multi-voltage UPF analysis, formal equivalency checking, and physical verification.
Utilize industry standard EDA tools from Cadence, Synopsys, and Siemens
Write scripts in Python, TCL, Perl, UNIX Shell to aid design and development activities, including flow enhancement or development.