PDK Engineer (FP-50024280)

Cirrus Logic•Austin, TX

About The Position

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldnât do it without our extraordinary workforce â and thatâs where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! As a Staff PDK Engineer, you will assist in designing high-performance mixed-signal ASICs by developing & integrating technology files, models & decks (DRC, LVS, and PEX) to support our PDKs. Collaborate closely with design teams, foundries, and our silicon technology team to develop and verify PDKs. You will apply expertise to EDA methodology, including development, qualification, automation, and support, as well as evaluation & development of new tools & flows.

Requirements

BS in Electrical or Computer Engineering and 12+ years of proven experience in related CAD field or MS in Electrical or Computer Engineering and 10+ years of exp.
A strong understanding of front-to-back analog/mixed-signal design methodology.
Strong experience on DRC, LVS and parasitic extraction flow (based on Calibre is a plus).
Experience with PDK installation, customization and QA.
Experience with PDK development and validation.
Ability to effectively support layout & design teams.
Able to demonstrate programming knowledge in Perl, SKILL, Tcl, Python and/or shell scripting.
A hardworking individual who possesses strong organizational & interpersonal skills, and demonstrates versatility in handling a wide range of CAD methodology issues.
Expertise in one or more of the following areas: Developing Cadence dfII technology files, netlisting, simulation & Pcells OR Development of physical verification decks in Calibre DRC.