Mixed signal verification Engineer (Graduate)

Retym • Austin, TX

9h

About The Position

We are seeking an engineer to join the Retym mixed-signal verification team. The role involves verifying digital and analog designs using behavioral modeling, SystemVerilog, UVM, and Cadence Virtuoso. You will contribute to developing cutting-edge technology for the next generation of high-speed communication systems.

Requirements

• Bachelor’s degree (or higher) in Electrical Engineering
• Experience 1-3 years
• Exposure to digital design and verification using Verilog or SystemVerilog (through coursework, projects, or internships)
• Basic understanding of digital, analog and mixed-signal circuit concepts
• Familiarity with schematic design tools such as Cadence Virtuoso (academic) – advantage
• Collaborative Environment: Ability to work in a team and learn from senior engineers while contributing to verification of analog/mixed-signal designs.
• Communication: Clear written and verbal communication skills for documenting work, writing test plans, and presenting results. Demonstrated ability to ask questions, seek guidance, and share findings with multi-disciplinary teams.
• Self leaner, highly motivated.

Nice To Haves

• Familiarity with UVM (Universal Verification Methodology) concepts
• Exposure to both Synopsys and Cadence tool flows through university or internship projects
• Understanding of mixed-signal verification concepts, even if no direct industry experience
• Relevant universtiy courses: o Advanced Design of Analog Circuits in Digital Processes o Digital System Design and/or Digital logic systems o Analog Electronics and/or Analog Integrated Circuits

Responsibilities

• Develop verification strategies for digital and analog (mixed-signal) designs, utilizing UVM methodologies based on specifications.
• Create behavioural models for analog blocks in accordance with guidelines provided by analog designers.
• Write, execute, and debug testbenches using UVM methodology and SystemVerilog code for mixed-signal blocks.
• Run and debug behavioural model (BM) validation using AMS tools to ensure the correctness of the behavioural models.
• Perform and troubleshoot unit-level, cluster-level and top-level simulations of mixed-signal designs.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level