Memory Subsystem Verification Engineer

Advanced Micro Devices, Inc•Raleigh, NC

14h

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Memory Subsystem team at AMD is hiring a Verification Engineer – Memory Subsystem to contribute to the design, development, and verification of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role involves IP- and subsystem-level verification and participation in pre-silicon firmware and hardware co-verification using hybrid simulation environments and Universal Verification Methodology (UVM). THE PERSON We are looking for a collaborative and detail-oriented professional who is passionate about verification engineering and eager to contribute to innovative memory subsystem solutions. The ideal candidate thrives in a team environment, communicates effectively, and approaches challenges with curiosity and problem-solving skills. You should be comfortable working with experienced engineers, sharing ideas, and learning continuously while contributing to the success of complex verification projects.

Requirements

Strong fundamental and foundational knowledge and application of Object-Oriented Programming
Proficiency in System Verilog, UVM, and C/C++
Experience in digital design verification or related coursework
Understanding of testbench architecture, assertions, and coverage
Experience with Python or shell scripting
Familiarity with Git and/or Perforce
Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related field.

Nice To Haves

Exposure to DDR/JEDEC standards, DDR PHY, or memory controllers
Experience with assertions (SVA/OVL)
Exposure to firmware and hardware co-verification using UVM and C-DPI
Familiarity with System C or architectural modeling
Exposure to emulation platforms such as Zebu

Responsibilities

Develop and maintain UVM-based verification environments for memory subsystems and associated IP
Create and execute test plans, testcases, and regressions
Participate in firmware and hardware co-verification efforts
Integrate and debug Memory VIP, transactors, monitors, and checkers
Analyze functional and code coverage and assist in closing coverage gaps
Debug simulation failures and collaboration with cross-functional teams