Member of Technical Staff, Performance Modeling

Netpreme • Boston, MA

21d • Onsite

About The Position

We are seeking a Member of Technical Staff, Performance Modeling to develop and apply performance models for our silicon and the full systems it operates within. The role focuses on building rigorous, decision-useful models that connect architectural choices to real end-to-end workload behavior.
You’ll work close with silicon architects and workload teams to explore design tradeoffs, validate performance assumptions, and identify bottlenecks early in the development cycle. This role is well-suited for engineers who enjoy reasoning from first principles, working with incomplete information, and co-exploring the design space as hardware and software evolve together.
This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field.
• 5–10+ years of experience in performance modeling for computer architectures, accelerators, or high-performance networking systems.
• Strong comfort working under uncertainty and iterating on models as designs and requirements evolve.
• Solid understanding of modern machine learning workloads and how they map onto hardware systems.
• Ability to reason across multiple abstraction layers, from architectural details to system-level performance behavior.

Nice To Haves

• PhD in Electrical Engineering, Computer Engineering, or a related field.
• Prior experience modeling performance for ML accelerators and/or ML-focused networking.
• Familiarity with shared memory systems and frameworks (e.g. CUDA VMM).
• Experience with scale-up and high-bandwidth interconnects (e.g. NVLink or similar technologies).

Responsibilities

• Build and maintain performance models for our silicon, spanning individual components through full networked systems.
• Evaluate architectural decisions using end-to-end ML workloads, translating model outputs into actionable guidance for the silicon team.
• Work day-to-day with silicon architects, system designers, and workload owners to align performance expectations and constraints.
• Develop frameworks and methodologies for performance verification, including sanity checks, model validation, and comparison against empirical data.
• Identify performance bottlenecks, scaling limits, and sensitivity points across compute, memory, and interconnects.
• Clearly communicate modeling assumptions, limitations, and conclusions to both technical and non-specialist stakeholders.

Benefits

• Competitive salary commensurate with experience including base salary, performance-based bonus, and early stage equity grant
• Comprehensive benefits including health, dental, vision, and life insurance
• Well-equipped, sunny offices in Santa Clara, CA and Boston, MA
• Relocation assistance and visa sponsorship
• Perks include a daily lunch stipend, 401k match, and more
• A collaborative, continuous-learning work environment with smart, dedicated colleagues engaged in developing the next generation of architecture for high-performance computing

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level