About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are seeking a Lead Solutions Engineer specializing in runset enablement to support advanced semiconductor technologies. This role is critical for timely delivery of physical verification solutions by providing full-time coverage in the U.S. time zone. You will lead development and validation of Pegasus DRC and LVS runsets, collaborate with R&D on CCRs, and enable customer adoption through robust automation and best practices.

Requirements

  • MS degree with 5+ years of experience or PhD with 3+ years in Electrical Engineering, Computer Science, or related field.
  • Strong understanding of semiconductor design and physical verification flows.
  • Proven expertise in developing and validating DRC and LVS runsets for Pegasus or similar tools (Calibre, ICV, Assura).
  • Proficiency in scripting languages (TCL, Python, Perl) and Linux/Unix environments.
  • Familiarity with chip fabrication processes and multi-die integration challenges.
  • Experience in automation frameworks for regression and validation.
  • Strong leadership and mentoring capabilities.
  • Excellent written, verbal, and presentation skills.
  • Ability to influence cross-functional teams and drive strategic initiatives.
  • Innovative mindset to explore unconventional solutions and optimize workflows.
  • Operate with integrity and foster collaboration across global teams.

Nice To Haves

  • Experience with PERC and Fill runsets.
  • Deep knowledge of advanced process technologies and methodologies (Ground Rules, SmartFill, ESD).

Responsibilities

  • Lead development and validation of Pegasus DRC and LVS runsets for advanced nodes.
  • Architect automation frameworks for regression execution, issue detection, and validation reporting.
  • Collaborate with R&D to resolve CCRs, influence product roadmap, and implement performance improvements.
  • Provide technical enablement and support for customers on tool usage and advanced methodologies.
  • Mentor junior engineers and establish best practices for runset development and QA.
  • Work closely with internal teams to ensure timely delivery of verification solutions.

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What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

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