Logos Space is a Low Earth Orbit (LEO) satellite system purpose-built to serve the connectivity needs of the commercial enterprise users and government users. We will help fill an important gap in the market, providing resilient, high-performance satellite-based connectivity services to enterprise and government customers worldwide. Business customers have contracts with agreed-upon performance standards for their broadband, and Logos will build these capabilities into the system from the beginning. Speed and reliability are the foundation of the system. Logos is designed to extend cloud and data center network connectivity anywhere in the world to fixed, seaborne, and airborne terminals. Logos is led by a team of highly experienced engineers with proven track records in the networking and satellite industries. Position Summary: The Lead, FPGA Design Engineering is a high profile role and this engineering lead is responsible for conceiving, planning, partnering and executing the DSP, waveform and transceiver chain designs, inclusive of fixed point design, implementation, integration on FPGA platforms for use in spacecraft payloads, terminal and ground systems. Hence, a big part of the role is to give definition and meaning to this function in the Logos context, sizing it properly, simplifying it when necessary and then building the team and, through the team, and along with partner teams, owning the production readiness of the IP implemented on FPGA platforms. This person is also responsible for working through implications of various platform choices and then making the final decisions that would give the best FPGA outcomes at the fastest program speed. You should be prepared to work and thrive in a fast moving environment where you are comfortable taking vague ideas and turning them into executable actions for the entire modem engineering team. We are seeking Engineering leads who like to solve very hard problems!
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Job Type
Full-time
Career Level
Mid Level