Lead Analog SerDes Architect/Design Engineer

Intel • Us, CA

1d • Onsite

About The Position

Intel Integrated Photonics Solutions (IPS) is driving the future of high-speed connectivity for data centers through cutting-edge silicon photonics integration. As part of Intel’s Data Center Group, we are transforming Intel from a PC-centric company into a leader powering the cloud and billions of connected devices. Since pioneering the world’s first hybrid silicon laser, IPS has led the industry in scalable, high-volume manufacturing and advanced photonics development. Our mission: deliver next-generation bandwidth growth with smaller form factors, co-packaging, and speeds from 400G today to 1.6T+ tomorrow. We are seeking a Lead Analog SerDes Architect / Design Engineer to join our team and shape the future of data center connectivity. In this role, you will: Defining circuit architecture and enabling designs meeting power, and performance for next generation optical interconnects based on system specifications. As part of the team developing key integrated circuit components the engineer must be able to work collaboratively leading block level development. Specify, architect and design low voltage and low power Mixed-Signal integrated circuits and work collaboratively with digital designers. Plan design work with constraints on performance, schedule and quality. Provide guidance to junior designers and layout engineers. Guidance to develop test plans for post-silicon characterization. Document all design work with review materials and detailed design descriptions. . If you are passionate about pushing the limits and want to influence Intel’s differentiation in advanced photonic development, join us and accelerate the future of data center technology,

Requirements

• The ideal candidate should have a minimum of MS in Electrical Engineering with 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies.
• Hands-on circuit design experience of SerDes blocks like Equalizers, PLL, Phase-Interpolators, CDR, etc. for 28Gbps+ data rates.
• Experience with design of inductors, transmission line, Trans-Impedance Amplifiers (TIA) and modulator drivers.
• Experience with design of precision analog circuits like ADC/DACs.
• Experience with designing PAM4/NRZ links.
• Experience with Mixed signal design flow
• Experience with full-chip designs, ESDs and verification flows.

Nice To Haves

• Familiarity with Optical communications.
• Experience with 400G/800G/1.6T optical links.
• Experience with package/test setup design.

Responsibilities

• Defining circuit architecture and enabling designs meeting power, and performance for next generation optical interconnects based on system specifications.
• As part of the team developing key integrated circuit components the engineer must be able to work collaboratively leading block level development.
• Specify, architect and design low voltage and low power Mixed-Signal integrated circuits and work collaboratively with digital designers.
• Plan design work with constraints on performance, schedule and quality.
• Provide guidance to junior designers and layout engineers.
• Guidance to develop test plans for post-silicon characterization.
• Document all design work with review materials and detailed design descriptions.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
• Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees