IP Design Verification Engineer

Intel Corporation • Santa Clara, CA

2d • Hybrid

About The Position

Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet. Life at Intel: https://jobs.intel.com/en/life-at-intel Intel is looking for an IP Design Verification Engineer that performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. This position is not eligible for Intel Immigration Sponsorship

Requirements

• A Bachelor’s degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent, with 1+ years relevant internship experience such as:
• Spec analysis
• FSDB debug
• New flow bring up and feature debug
• Coverage definition and closure
• Applying complex constraints

Nice To Haves

• Master’s preferred degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent
• Experience with coherency validation a plus.

Responsibilities

• Performs functional verification of IP logic to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Number of Employees: 5,001-10,000 employees