Internship - Optical Design Engineer

ASML • San Jose, CA

1d

About The Position

Introduction to the job As a member of the Computational Alignment team, you will contribute to the development of novel algorithmic solutions in computational optics, targeting highly complex 3D volumetric structures generated through standard wafer fabrication processes. Your work will involve exploratory research on cutting-edge topics in computational optics, supporting advancements in wafer alignment and overlay metrology tools. The ideal candidate is highly motivated, self-driven, and demonstrates the required technical skillset along with a strong passion for scientific innovation. Your Assignment Develop advanced software functionalities for computational optics simulation, with a focus on wafer alignment and overlay technologies Design and implement rigorous unit tests to validate new concepts and quantify performance improvements Communicate findings effectively across cross-functional teams through clear documentation and presentations. The ideal candidate is a self-motivated problem solver, driven by scientific curiosity and technological innovation, and comfortable working independently on research-oriented challenges. Other duties as assigned Job description subject to change at any time

Requirements

• Ph.D candidates in physics, applied physics, electrical engineering, or related fields, with emphasis on optics and photonics
• Deep expertise in numerical simulation of Maxwell’s equations and computational electrodynamics, with hands-on experience using the Finite-Difference Time-Domain (FDTD) method.
• Solid understanding of semiconductor nanofabrication processes, including dry etching, deposition, chemical mechanical polishing (CMP), and lithography.
• Proficiency in programming languages such as MATLAB, C, C++, and Python.
• Familiarity with Linux/Unix environments, particularly within High Performance Computing (HPC) systems.

Responsibilities

• Develop advanced software functionalities for computational optics simulation, with a focus on wafer alignment and overlay technologies
• Design and implement rigorous unit tests to validate new concepts and quantify performance improvements
• Communicate findings effectively across cross-functional teams through clear documentation and presentations.
• Other duties as assigned

What This Job Offers

• Career Level: Intern
• Education Level: Ph.D. or professional degree
• Number of Employees: 5,001-10,000 employees