Intern, System Validation, Co-Packaged Optics

Ayar Labs•San Jose, CA

7d•$44 - $55•Onsite

About The Position

Ayar Labs is pushing the boundaries of optical interconnect technology with our revolutionary multi-wavelength sources and CMOS chiplets. We are looking for a motivated undergraduate or graduate intern to join our Post-Si Validation team to play a pivotal role in the validation efforts that ensure our groundbreaking products meet and exceed both component and system-level requirements. You will also collaborate with multi-disciplinary teams to identify and implement product improvements through Automatic Test Equipment (ATE), bench characterization, and other techniques. The projects are tailored to your experience and interests, and you will be mentored by a senior engineer as you work alongside with Ayar Labs engineers to help drive the optical I/O revolution. If you are passionate about solving complex technical challenges and an interest in laser, photonics, CMOS, and system-level concepts, this is your chance to assist in the future of interconnect technology.

Requirements

Actively pursuing a B.S. or M.S. degree in Electrical Engineering, Computer Engineering, Physics, or equivalent.
Familiarity with component and system test equipment (BERT, DCA, OSA, etc.) and standard signal quality metrics (TDECQ, SRS, URS)
Sound knowledge of high-speed SerDes and their characterization and optimization
Proficiency in programming languages (Python, etc.) for test automation and data analysis
The ideal candidate is an independent and highly-motivated student who is able to work collaboratively and independently, and can self-manage time effectively to take projects to completion.