ICE (In-Circuit Emulation) Technology and Model Development Principal Engineer

Intel Corporation • Austin, TX

5d • Onsite

About The Position

Join our cutting-edge validation team and drive the future of emulation technologies for next-generation SoCs and systems. As a technical leader, you will architect and implement advanced Emulation/FPGA methodologies that accelerate functional validation and enable full-system integration. Key Responsibilities • Architect Innovative Solutions: Design and optimize state-of-the-art emulation and FPGA strategies for functional validation, including Full System and In-Circuit Emulation (ICE) using Cadence Palladium. • Lead Shift-Left Initiatives: Champion early validation methodologies to reduce time-to-market, ensuring robust readiness and scalability across projects. • Cross-Functional Collaboration: Partner with pre-silicon, post-silicon, platform validation, and customer co-validation teams to deliver seamless integration and maximize emulation efficiency. • Strategic Validation Leadership: Drive test-plan reviews, define emulation validation strategies, and create high-quality collateral to support comprehensive system-level validation. • Enable Next-Gen Platforms: Influence architecture decisions and validation flows that shape the future of complex SoC and system designs. Additional Skills Excellent problem-solving skills and a self starter Good communication and project management skills Ability to work effectively in a cross-site team environment

Requirements

• Bachelors Degree in Computer Engineering or Computer Science or Electrical Engineering with 10+ years of experience
• 8+ years of experience in SoC design for In-Circuit Emulation or FPGA
• Strong background in validation functional and debug collaterals (transactors, trackers/checkers/monitors, coverage, test stimulus
• Hands-on experience with pre-silicon and post-silicon validation environments.
• Experience in emulation flow, debug methodologies, or testbench development
• Experience in commercial emulation platforms
• Excellent problem-solving skills and a self starter
• Good communication and project management skills
• Ability to work effectively in a cross-site team environment

Nice To Haves

• Working knowledge with PCIE Gen6 speed-bridges and memory technologies (DDR, LPDDR)
• Strong software programming skills, proficient in C and/or C++, familiar with Linux/UNIX based development environments, tools, and script languages such as Perl, TCL/TK, and good software engineering practices

Responsibilities

• Architect Innovative Solutions: Design and optimize state-of-the-art emulation and FPGA strategies for functional validation, including Full System and In-Circuit Emulation (ICE) using Cadence Palladium.
• Lead Shift-Left Initiatives: Champion early validation methodologies to reduce time-to-market, ensuring robust readiness and scalability across projects.
• Cross-Functional Collaboration: Partner with pre-silicon, post-silicon, platform validation, and customer co-validation teams to deliver seamless integration and maximize emulation efficiency.
• Strategic Validation Leadership: Drive test-plan reviews, define emulation validation strategies, and create high-quality collateral to support comprehensive system-level validation.
• Enable Next-Gen Platforms: Influence architecture decisions and validation flows that shape the future of complex SoC and system designs.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
• Find more information about all of our Amazing Benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees