IC Design Engineer Intern
About The Position
Summer 2026 Internship - Currently enrolled in MS or PhD EE program. Must not have graduated before September 2026 May 26 - August 14 (willing to entertain candidates who can start earlier, even if part time) Hybrid - San Jose This position is in CMSD, which is part of Renesas’ Analog & Connectivity organization. The CMSD R&D team develops and industrializes highly configurable mixed-signal products for a wide range of applications, including but not limited to consumer, communication, computing, data center, industrial, and automotive applications. CMSD team is the pioneer and dominant market leader of the highly successful GreenPAKTM family of products. This customer configurable product and platform enables customers to differentiate their products, reduces BOM cost and development cost and time. CMSD team is continuously expanding our product portfolio that includes high performance analog IP’s, DC-DC, and FPGA. As a Design Intern Engineer, you will design analog block-level and sub-system circuits to meet the functional and performance specifications of custom mixed-signal ASICs to give the company a competitive advantage in the IC market.
Requirements
- Currently enrolled in MS or PhD EE program. Must not have graduated before September 2026
- Strong academic background in analog circuit design.
- Strong problem-solving skills with the ability to analyze and troubleshoot circuits.
- Design experience in power management circuits and exposed to high voltage (BCD process).
- Competence with EDA design tools and the Cadence design environment.
- Concise and precise communication and presentation skills within multi-site and multi-cultural environment.
- Good verbal and written communication skills; ability to work collaboratively within a team.
Nice To Haves
- Exposed to motor driver is a plus.
Responsibilities
- Design of analog and power integrated circuits.
- Run analog/mixed signal verification simulations at block and/or chip level.
- Assisting in design, simulation and verification of analog/power circuits.
- Interface with layout, verification, test, product and application engineers to successfully bring new products from initial concept through release to production.
- Participate in discussions and draft documents of technical issues and other design aspects with internal teams and customers.
- Guide layout team to ensure quality of layout of own designs.
- Lab evaluation and support for circuit blocks/whole ICs.
- Support test development and ramp to production
Benefits
- sick leave
- holiday pay
- medical, dental, and vision insurance
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What This Job Offers
Career Level
Intern
