High-Speed Analog & Mixed-Signal PHY Design Engineer

Qualcomm • San Diego, CA

11d • $164,000 - $246,000

About The Position

Qualcomm's Mixed-Signal PHY design team is actively looking for analog and mixed-signal circuit designer to work on SerDes PHY designs. This designer will be involved in delivering next-generation PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-edge CMOS process technology nodes at 7nm and beyond. Design goals also include low-power analog designs to address Qualcomm's wireline interface need.

The primary responsibility of this position entails working within a team to deliver analog and mixed-signal transistor level circuit designs along with supervising physical layouts of the high speed, low-power PHY SerDes blocks. Experience with >32Gbps transceiver or clocking design is highly desired

Requirements

• Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 6+ years ASIC design, verification, or related work experience.
• Master's degree in Electrical Engineering or related field and 6+ years ASIC design, verification, or related work experience.
• PhD in Electrical Engineering or related field and 4+ years ASIC design, verification, or related work experience.
• 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).

Nice To Haves

• PhD in Electrical Engineering or related field.
• 6+ years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., VCO, PLL, and DLL design, Audio CODEC and Class D Audio amplifier design, Delta-Sigma, SAR ADCs, Current-Steering DACs, high speed DDR PHYs, high-speed SERDES).
• 2+ years of work experience in a role requiring interaction with senior leadership (e.g., Director and above).
• 1+ year of experience in a technical leadership role.

Responsibilities

• Uses advanced tools or databases to lead a chip or IP block and build end-to-end architecture and complex circuit designs for multiple blocks; leads design reviews and provides feedback and guidance to others.
• Works with layout teams to oversee layout of a chip or IP block.
• Defines verification plan for entire IP or chip and identifies and runs complex simulations and analyses (e.g., power, performance) on designs; documents and utilizes results to improve and verify designs and optimize power, performance, and functionality.
• Designs, programs, and runs complex, comprehensive tests for large subsystems and reviews tests of junior team members; ensures complex bugs and other issues are identified and appropriately analyzed, and identifies solutions or areas of improvement.
• Establishes rapport with internal or external users, and third-party vendors to align on project and implementation plans and ensure the needs of all stakeholders are met.
• Applies deep understanding across multiple domains to ensure all components will integrate in the broader framework.
• Writes clear and detailed technical documentation and design descriptions for highly complex or difficult projects to guide users and/or customers and assists junior team members to do the same.
• Conducts research on industry trends and innovations in analog or mixed-signal integrated circuit design to understand one's business unit and adopt best practices in solutions and deliverables across the system and encourages others to do the same.
• Leads conversations to generate new ideas and directions to explore for new initiatives; pursues opportunities to plan and develop new ideas.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees