Analog and Mixed Signal Design Engineer

Intel • Hillsboro, OR

5d • Onsite

About The Position

The Group: Intel's Advanced Design Foundational IP Organization (AD-FIP) within Design Technology Platform (DTP) focuses on pathfinding and development of advanced logic, memory, and analog/mixed-signal circuits to enable best-in-class Foundational IP collateral and product design across all generations of Intel process technology. Critical technologies AD-FIP delivers to Intel are Digital and Analog Standard Cell Libraries, Embedded Memory (SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, BGR, ADC, etc.), High-speed I/O Reference Designs (DDR, UCIe, PCIe, SerDes, GPIO), RF and Wireless Circuits (Wave Guide TX, Power Amplifier). As an analog and mixed-signal IC designer your day-to-day responsibilities will include, but not always be limited to: Developing, designing and testing circuit blocks including wireline IO AFEs, clocking circuits, and voltage regulator circuits as well as integrating them into Intel's leading technology test chips. Capture of design and measurement results to guide the next generation of process technology and circuit specifications based on requirements for SoC building blocks and critical wireline interfaces. Work closely with process and IP engineers to anticipate AMS IP requirements and use design and test results to inform and accelerate process technology and product development.

Requirements

• You must possess the below minimum qualifications to be initially considered for this position.
• Bachelor’s degree in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 10+ years of experience, OR Master's degree in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 8+ years of experience, OR Ph.D. in Electrical, Computer or Electrical and Computer Engineering, or related STEM field with 3+ years of experience.
• The qualifications listed below must meet the required years of experience associated with the candidate’s degree level:
• Experience with design of custom analog or mixed-signal circuits.
• Analog or mixed signal design skills including specification, design or verification.

Nice To Haves

• Experience in one or more of the following areas is preferred: GPIOs, high speed parallel or serial IO links and their subcomponents (data path, TX, RX, etc.), clock distribution, clock conditioning, clock recovery circuits, voltage regulators, voltage reference circuits, ADCs/DACs, inductors, transmission lines, RF and millimeter-wave circuits, test of custom analog and mixed-signal circuits.

Responsibilities

• Developing, designing and testing circuit blocks including wireline IO AFEs, clocking circuits, and voltage regulator circuits as well as integrating them into Intel's leading technology test chips.
• Capture of design and measurement results to guide the next generation of process technology and circuit specifications based on requirements for SoC building blocks and critical wireline interfaces.
• Work closely with process and IP engineers to anticipate AMS IP requirements and use design and test results to inform and accelerate process technology and product development.

Benefits

• We offer a total compensation package that ranks among the best in the industry.
• It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel .
• Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD
• The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
• Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
• Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level