Hardware Emulation Engineer

ARM • San Diego, CA

2d • Hybrid

About The Position

About Arm Arm is the industry's leading supplier of microprocessor technology, offering the widest range of microprocessor cores to address the performance, power, and cost requirements for almost all application markets. With a vibrant ecosystem of over 1,000 partners and more than 150 billion processors shipped, our technology is at the heart of a computing and connectivity revolution that continues to transform the way people live and businesses operate. Job Overview We are seeking an experienced Hardware Emulation Engineer to lead the deployment, optimization, and debug of large-scale SoC designs on hardware emulation platforms such as Synopsys ZeBu, Siemens Veloce, or Cadence Palladium. You will collaborate closely with design, verification, software, and validation teams to accelerate pre-silicon bring-up, software development, and system-level power and performance analysis. As a senior contributor, you will also mentor junior engineers, drive emulation methodologies, and help define flows that improve debug efficiency and turnaround time.

Requirements

• Degree in Electronics, Computer Engineering, or equivalent - with 3-8 years of experience in ASIC/SoC verification or emulation.
• Hands-on experience with at least one major emulation platform from EDA vendors like Synopsys, Siemens or Cadence.
• Strong RTL, synthesis, and timing knowledge (SystemVerilog/Verilog/VHDL).
• Proficient in debug tools and waveform analysis (SimVision, Verdi, or DVE).
• Solid understanding of transactors and standard interfaces (AXI, PCIe, DDR, USB, Ethernet, etc.).
• Skilled in C/C++, scripting and automation (Python, Perl, or TCL).
• Familiar with SystemVerilog testbenches, acceleration, and SoC boot flows.
• Experience with CPUs and SoC boot flows, and firmware loading.
• Excellent problem-solving and cross-team collaboration skills.

Nice To Haves

• Experience with hybrid emulation (Palladium/Protium) or FPGA prototyping flows.
• Knowledge of performance and power validation in emulation environments.
• Experience with multi-clock domain designs and CDC debug.
• Exposure to post-silicon bring-up and correlation with emulation results.
• Familiarity with CI/CD automation (Jenkins, GitLab CI) for emulation regression management.
• Leadership experience mentoring junior engineers or leading small teams.

Responsibilities

• Lead emulation compilation, partitioning, mapping, and bring-up of sophisticated SoC and subsystem RTL designs.
• Develop and maintain automated emulation flows and scripts (TCL, Python, Makefiles).
• Collaborate across RTL, verification, and software teams to integrate IP, debug issues, and enable pre-silicon software bring-up.
• Implement and optimize transactors, virtual bridges, and hybrid co-simulation for software execution.
• Work with EDA vendors to evaluate new emulator features and drive performance improvements
• Mentor junior engineers on flows and methodologies.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees