FPGA Engineer

Xona Space Systems • Burlingame, CA

2d

About The Position

Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth.
With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection.

We’re seeking an FPGA Engineer to design and implement high-performance, signal-processing solutions for next-generation LEO PNT satellite systems. You will focus on implementing advanced DSP and communications algorithms into efficient, resource-optimized RTL, collaborating across systems, RF, and software teams to deliver flight-ready hardware.

Requirements

• MS or BS in Electrical Engineering, Computer Engineering, or related field; 3+ years of FPGA development experience.
• Strong understanding of DSP fundamentals (filters, synchronization, FFT, NCOs, correlators).
• Proficiency in VHDL/Verilog/SystemVerilog and FPGA toolchains (Xilinx/AMD).
• Experience with fixed-point modeling and bit-accurate verification.
• Good degree of comfort with simulation tools and scripting (Python, TCL, bash, or similar).

Nice To Haves

• Experience with satellite communications and GNSS.
• Solid fundamentals in high-speed digital logic design and timing closure techniques.
• Experience with lab validation, test automation, and hardware debugging tools

Responsibilities

• Authoring RTL: Implement acquisition, tracking, data decoding, synchronization, and measurement-processing algorithms in FPGAs (VHDL/Verilog/SystemVerilog).
• DSP Fixed-Point Design: Convert floating-point models into fixed-point micro-architecture; perform quantization analysis and optimize for performance and resource utilization.
• FPGA Optimization: Optimize designs for timing closure, latency, power, and resource efficiency (DSP slices, BRAM, LUTs).
• Verification & CI/CD: Develop testbenches, simulation toolchains (ModelSim or similar), and validate against Python/C++ reference models.
• SW Integration: Support hardware bring-up, debugging, SW integration and performance validation in the lab and within HIL environments.
• Documentation: Document RTL architecture, design trade-offs, verification results, and performance metrics.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 11-50 employees