EVA DV Engineer

QualcommSan Diego, CA
6d

About The Position

As a Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically Computer Vision hardware IP and subsystem. You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia subsystems for integration into SoCs for mobile applications.

Requirements

  • Bachelor's degree in Electrical Engineering, or Computer Science/Engineering, or a closely related field
  • 2+ years of experience with ASIC design and verification tools, techniques, and methodology
  • Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
  • Master's degree in Computer or Electrical Engineering, Computer Science, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
  • PhD in Computer or Electrical Engineering, Computer Science, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Nice To Haves

  • Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field
  • 2+ years of experience with ASIC design and verification tools, techniques, and methodology
  • Test planning, problem solving, debug, Verification of Multi-media hardware
  • Strong working knowledge of HVLs: System Verilog, OO programming. Verilog , C/C++, Tcl/Perl/python/shell-scripting
  • 2+ years of experience with developing block-level testbench environment using SystemVerilog. Strong experiences in coverage-driven constrained random verification is preferred.
  • 2+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
  • 2+ years of experience with scripting/automation skills using either Perl or python
  • Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
  • Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
  • Experience in formal verification is plus

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What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

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