Engineer

Qualcomm • Santa Clara, CA

1d

About The Position

This position is for the Product and Test Engineering group at the Connectivity division in Qualcomm. Engineers in this position develop test solutions for characterizing WLAN SOCs. Main responsibilities include defining and executing the development of test methodologies and characterization of WLAN Transceivers (802.11a/b/g/n/ac/ax/be/bn), Power Amplifier, PLL, ADC, DAC, High Speed SERDES Interfaces such as PCIe, USB3, MIPI (DSI, CSI), leading edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, PHY, IOs, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces.
Responsibilities include developing and executing characterization plans to optimize design parameters and compliance validation and driving corresponding first silicon bring up & debug. Work closely with different cross functional teams from initial stages of product definition through release of products to the customers. Engineers in this position will also assist in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design.

Requirements

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Nice To Haves

• Basic familiarity with common lab tools such as oscilloscopes, spectrum analyzers, VNAs, logic analyzers, and network analyzers.
• Experience with scripting languages- C# and Python.
• Experience in understanding and modifying LabVIEW code.
• Familiarity with cellular standards such as CDMA2000, 1X-EVDO, WCDMA, UMTS, GSM/GPRS/EDGE, or wireless peripheral standards WLAN or other OFDM-based systems, GPS and Bluetooth are desirable
• Familiarity with protocols such as PCIe/USB/MIPI and DDR is desirable
• MS EE or BS EE with minimum (4+ yrs. of industry experience)

Responsibilities

• defining and executing the development of test methodologies and characterization of WLAN Transceivers (802.11a/b/g/n/ac/ax/be/bn), Power Amplifier, PLL, ADC, DAC, High Speed SERDES Interfaces such as PCIe, USB3, MIPI (DSI, CSI), leading edge LP-DDR & PC-DDR Subsystem components (DRAM, DRAM Controller, PHY, IOs, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces.
• developing and executing characterization plans to optimize design parameters and compliance validation and driving corresponding first silicon bring up & debug
• assist in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees