Engineer I - Software (FPGA Timing and Power)

Microchip Technology Inc. • San Jose, CA

2d

About The Position

The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip’s FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, and simulation. Within the Software organization, the Timing, Power, and Modeling group is responsible for developing high-quality and user friendly software for the evaluation of FPGA design performance, both for speed and power consumption. These are key sign-off tools, distributed along with the hardware to a wide range of customers and are also used internally for the exploration of new FPGA architectures. We research and implement cutting-edge fast and scalable algorithms with the objective of helping FPGA designers close on their timing requirements within an increasingly limited power budget. To meet these goals, we draw from a variety of computer science domains, including: numerical optimization, linear programming, graph theory, modeling non-linear electronic components, large data processing and machine learning based regression and classification methods. As a member of this R&D team, you will leverage your solid foundations in computer science to develop next generation performance evaluation (timing and power) algorithms. Your work will used by thousands of well-known customers, and your achievements will improve the overall solution, both internally and externally.

Requirements

• BS in CS/EE or related field
• Strong knowledge in C++, as well as a deep understanding of algorithms and data structures
• Experience with shell scripting languages (Perl, Python, Bash, TCL)
• Excellent problem-solving skills and attention to detail
• Strong communication skills and the ability to work collaboratively across teams

Nice To Haves

• Experience with source code management systems (ClearCase, Git, SVN, Perforce)
• Exposure to parallel programming techniques, like TBB
• Familiarity/knowledge/experience with any of the following would be a plus: FPGA architectures, Qt, AI-based applications

Responsibilities

• Develop solutions tailored towards supporting very large graph representation.
• Improve tools' run time to competitive levels.
• Improve the user experience through guidance tools and context-based help.
• Integrate some of the capabilities in an internal flow to evaluate future FPGA architectures.
• Participate to the R&D exploration activities on advanced topics such as OCV, SSTA, IR Drop
• Help with the enforcement of Microchip’s Software Development Processes
• Perform design reviews, unit testing, and code reviews
• Own and sustain product features and provide customer support
• Continue learning latest EDA discoveries and contribute to the team discussions

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
• Find more information about all our benefits at the link below:
• Benefits of working at Microchip

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level