Engineer-I (Design)

Microchip Technology Inc. • Chandler, AZ

1d • $70,403 - $143,000

About The Position

This position is available to start late spring 2026! Microchip is seeking an ENTRY LEVEL, proactive and motivated engineer to join our team, focusing on Full Chip and Block-level Physical Design projects (from netlist to GDS) for the DSPIC divisions at Microchip. In this role, you will be responsible for all phases of physical design implementation, including physical verification and stream-out processes to external foundries, specifically for low-power, high-performance DSPIC microcontrollers with an emphasis on cost efficiency. This position requires strong technical ownership, advanced problem-solving abilities, and the capability to independently manage complex design and workflow challenges

Requirements

• Bachelor/ master’s degree in one or more of the following disciplines: Electrical/Electronics Engineering, Computer Engineering, Computer Science
• 0-3 years experience
• Deep understanding of CMOS device physics, Ultra-Deep-Sub-Micron effects, Semiconductor process technology and ASIC design and implementation flow
• Strong understanding of STA concepts, including setup/hold timing, clock uncertainties, and constraints.
• Hands-on experience with Place & Route tools (Innovus / ICC2) is preferred
• Scripting skills in one or more languages is preferred Perl, TCL, Python, Shell
• Basic understanding of RTL design (Verilog / VHDL)
• Ability to work independently under local project lead or supervisor mentorship.
• Strong debugging, analytical, and problem-solving skills.
• Excellent verbal and written communication skills.
• Strong interpersonal skills and ability to collaborate across global teams.

Responsibilities

• Complete Physical Design implementation including:
• Floor planning
• Power planning
• Sensitive signal planning / routing
• Place & Route
• Clock Tree Synthesis (CTS)
• Timing closure using industry-standard tools such as Cadence Innovus and Synopsys ICC2.
• Drive PPA (Power, Performance, Area) optimization
• Physical verification (DRC/LVS) and IP integration at full chip level.
• Ownership of Physical Design flow and methodology, including continuous improvement.
• Perform and analyze IR drop and EM (Electromigration) checks to ensure design reliability.
• Apply metric-driven design techniques to enable first-pass silicon success.
• Drive flow, methodology development, and automation to improve productivity and quality.
• Collaborate with cross-functional teams including RTL, Synthesis, STA, CAD, and Signoff teams.
• Development of technology setup files for new technologies
• New tool evaluation and research to support back-end flow improvement

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.
• Benefits of working at Microchip
• The annual base salary range for this position, which could be performed in the US, is $70,403-$143,000. Range is dependent on numerous factors including job location, skills and experience.
• Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
• At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level