Engineer, Digital Design Engineering

Analog DevicesColorado Springs, CO
$88,236 - $121,325

About The Position

In this position, you will join a team of digital/mixed-signal/analog designers and play a technical role as a digital design engineer for low power, high-speed SerDes IPs. You will be involved in the design, verification, and implementation of block and top level designs for high speed SerDes. These designs include interfaces to MIPI D-PHY and C-PHY transmitters and receivers, I2C, UART, SPI, RGMII, etc.

Requirements

  • Bachelor’s degree with 3+ years of experience or Master’s degree with 1+ years of experience is typical
  • Design and verification experience with complex digital designs using Verilog/SystemVerilog
  • Verification of digital or mixed signal blocks or systems
  • Experience architecting and planning designs at the block or system level, taking conceptual product definitions and translating to design implementations
  • Working knowledge of communication theory and protocols
  • Working knowledge of digital and analog circuit design trade-offs
  • Familiarity with timing analysis, power consumption, physical design and DFT concepts
  • Bachelor’s degree with 3+ years of experience or Master’s degree with 1+ years of experience
  • For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
  • Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
  • EEO is the Law: Notice of Applicant Rights Under the Law

Nice To Haves

  • Knowledge of advanced mixed-signal SerDes transceiver architectures is a plus
  • Knowledge of behavioral modeling and gate-level simulations is a plus
  • Familiarity with lab measurements and silicon debug is a plus

Responsibilities

  • Architect and design digital sections of complex mixed signal ICs, which include high-speed serial interfaces and solutions for routing video data
  • Write block specifications and track execution at block and top level
  • Use Verilog/SystemVerilog RTL to design digital blocks, subsystems, and top-level designs
  • Develop block level testbenches and verify block functionality as needed. Work with verification team for full verification and coverage closure.
  • Perform block and top level front-end tool flows. Linting, CDC, power analysis, and AI as needed.
  • Assist with synthesis constraints and timing closure.
  • Work with technical leads and team members across multiple disciplines, including design, verification, test, product definition

Benefits

  • medical, vision and dental coverage
  • 401k
  • paid vacation, holidays, and sick time
  • discretionary performance-based bonus
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