Embedded Systems Intern

Inspire SemiconductorAustin, TX
2d

About The Position

You will solve workflow fragmentation. Currently, our RISC-V development is split across manual FPGA simulations and hardware bring-up. You will unify this into a single, sleek VS Code-integrated GUI that serves as the Command Center for our entire engineering team.

Requirements

  • Major: Electrical Engineering or Computer Science.
  • Technical Edge: Expertise in Python/PySide6, C/CMake, and experience with GDB/JTAG debugging tools.

Responsibilities

  • A standalone and VS Code-integrated PySide6 GUI
  • Automate the full loop: loading bare-metal/Linux images, managing serial consoles, reset control via STM32G, and GDB debugging across both Xilinx FPGA and Thunderbird targets.
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service