Digital Design Engineer

Meta•Austin, TX

About The Position

Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. To apply, click “Apply to Job” online on this web page.

Requirements

Requires a Master’s degree (or foreign degree equivalent) in Computer Engineering, Computer Science, Electrical Engineering, or related field and three years of work experience in job offered or in a digital design or design engineer-related occupation
Requires three years of experience in the following:
RTL coding and Logic simulation
Digital design, micro architecture, or VLSI structural design
SystemVerilog or Verilog Hardware description languages
Python, Perl, or similar scripting language
ASIC Design Methodology
Low power design techniques such as clock gating, power gating, memory retention or power-down power states
Digital waveform analysis and C-model based verification of digital circuits

Responsibilities

Design and develop state-of-the-art SoC’s, and digital logic IC’s to drive virtual and augmented reality systems.
Contribute to the development of efficient micro-Architectures and ASIC digital micro-Architecture, design and verification.
Understand in-house IPs their integration, connection, and verification.
Drive top-level micro-Architecture definition and develop necessary RTL.
Drive chip-level integration, verification plan development and verification.
Supervise RTL-to-GDS flow and assist with synthesis and timing closure.
Support the test program development, chip validation and chip life until production maturity.
Work with FPGA engineers to perform early prototyping.
Support hand-off and integration of blocks into larger SOC environments.
Assist with algorithm analysis, verification and improvement.