2026 Summer - Digital Design / Design Verification Engineer Intern - Dallas TX
About The Position
The Electro Optical Infrared Systems (EOIS) line of business within DRS has locations in Dallas and Austin, TX, Melbourne, FL, and Cypress, CA. EOIS develops, manufactures, and supports infrared and electro-optical solutions for soldiers, ground vehicles and airborne platforms. We offer an exciting and challenging work environment, a competitive salary and benefits package, and a business culture that rewards performance. Employing the world’s brightest. Supporting the world’s bravest.Job SummaryThe individual will be an intern for the Readout Integrated Circuit (ROIC) or the FPGA development teams of the EOIS division. In this role, the intern will work closely with other team members to support development of digital integrated circuits (IC) for ROIC and Focal Plane Arrays (FPA) or support FPGA development for Infrared Sensors and Systems. Strong mentorship is provided, with plenty of opportunities to learn and develop new skills. Responsibilities will be broad, not narrow, providing for a higher growth opportunity.
Requirements
- Enrolled in an Undergraduate or Master's degree in Computer Engineering, or Electrical Engineering or related field with at least at 3.0 GPA
- Be available to work full-time (40 hours per week) for at least 10 weeks during Summer 2026 at the DRS Dallas facility
- U.S. Citizenship status is required as this position will require the ability to access US only data systems
- Windows/Linux OS
- Good listener and communication skills (verbal and written)
- Ambitious, dedicated, and goal-oriented
- U.S. Citizenship required. This position requires an active DOD security clearance or the ability to obtain such clearance within a reasonable time after commencement of employment.
Nice To Haves
- Understanding of digital logic and architecture concepts, techniques, and course work
- Basic knowledge of HDL/HVLs (e.g. VHDL, Verilog, System Verilog, UVM) and programming/scripting languages (e.g. C++, Perl, Python, TCL)
- Good lab debug skills
- Ability to multi-task in an evolving engineering environment
Responsibilities
- Support architecture tradeoff projects
- Participate in RTL coding and test bench development
- Contribute in IC or FPGA design flows for synthesis, place and route, timing closure, and design verification testing
Benefits
- competitive salaries and comprehensive benefits, including medical, dental, and vision coverage, a company contribution to a health savings account, telemedicine, life and disability insurance, legal insurance, and a 401(k) savings plan
- wellness programs that focus on physical, emotional, and financial well-being
- programs and activities to support career-growth, professional development, and skill enhancement
- flexible work schedules with our 9/80 program, competitive vacation, health/emergency leave, paid parental leave, and community service hours
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What This Job Offers
Job Type
Full-time
Career Level
Intern
Number of Employees
51-100 employees
