The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspect of front end implementation design challenges and methodology. As a member of the Graphics team, the successful applicant will integrate, implement and deliver state of the art GPU cores and will be working closely with the graphics microarchitecture and physical design teams to push and meet very aggressive Power, Performance and Area (PPA) targets. This role is a hands on role which include working with execution driven teams for tape-outs by supporting new methodologies and new flows required to address better PPA. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep sub-micron technologies. The ideal candidate would have/able to demonstrate the following: Experience with digital design and RTL synthesis Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime Strong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designs Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks Strong understanding of GPU micro-architecture and collaborate with RTL designers to improve bottlenecks for power and performance Solid working knowledge of scripting skills including tcl, perl or python Excellent communication skills and collaborating in a team environment is a must Excellent debug and analytical skills
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees