Design for Test Engineer Intern - CPU/AI Hardware
About The Position
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Be part of the team building the backbone of next-gen AI/ML chips. This role focuses on Design for Test (DFT) for high-performance IPs at the heart of industry-leading architectures. You'll work side-by-side with experienced engineers across the RTL, DFT, and Physical Design stack to bring silicon from idea to tapeout. This role is on-site, 40 hours, based out of Santa Clara, CA, Austin, TX or Ft Collins, CO.
Requirements
- Curious about how complex chips are tested and verified at scale
- Comfortable working with RTL and scripting languages like Tcl, Python, or Perl
- Understand digital design basics, scan, and test techniques like ATPG or BIST
- Actively pursuing a BS, MS, or PhD in EE, CE, ECE, or CS
Responsibilities
- Help define and implement DFT architecture across various IPs
- Collaborate with cross-functional teams from RTL to physical design
- Contribute to scan insertion, pattern generation, and verification workflows
- Push test coverage higher using smart, automated solutions
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What This Job Offers
Job Type
Full-time
Career Level
Intern
Number of Employees
501-1,000 employees
