Design For Test (DFT) Engineer
About The Position
We strive to be Your Future , Your Solution to accelerate your career! Contact Christine Gonzalez at [email protected] or , you can also schedule an appointment at to learn more about this opportunity! Design For Test (DFT) Engineer This is a Contract role. Position: Design For Test (DFT)Engineer (Contract Role) The team is looking for a Design-for-Test contractor to test and validate the next generation chips. Candidate will be responsible to work with Front End and Physical Design teams to implement DFT and test designs which will impact the product lines for radio frequency (RF) and BlueTooth/Wireless LAN chipsets.
Requirements
- 5+ years relevant industrial DFT experience
- Excellent problem solving and debugging skills
- Ability to complete assignments independently
Responsibilities
- Experience with memory BIST – Siemens Tessent Flow
- Experience with gate-level simulation and simulation debug
- Experience with automation and scripting – Tcl/Perl/Python
- Experience with scan compression – SEQ/Ultra/TestKompress
- Experience with ATPG – Tetramax
- Experience with ATPG diagnosis, ATE debug and silicon bring up
- DFT pattern translation – VTRAN
- Experience with RTL design – Verilog/system Verilog
- Some experience with STA and timing analysis concepts – PrimeTime (CDC, clock gating checks, timing constraints)
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Career Level
Mid Level
Education Level
No Education Listed
