Summer 2026 - Design Engineer Intern, Analog Power Management (7336)
About The Position
TSMC's Power Management design team is seeking an MSEE or PhD candidate with a background in Analog Circuit design with an interest in Power Management Integrated Circuits and Systems. In this role, you will support the research and development of highly integrated voltage regulators in TSMC most advanced 3DIC packaging technology. As part of this R&D team, you will be using TSMC’s state of the art process CMOS technologies mixed with 3D package and integrated passive device technologies to power large High-Performance Computing and Artificial Intelligence SoC’s. Job responsibilities include transistor level design, power system modeling and analysis, as well as silicon measurement and characterization. The successful candidate will be self-motivated, willing to learn exciting new technologies and be able to work effectively within a talented group of individuals. This position is located at TSMC’s Austin Design Center, Austin, TX. We are currently operating in a hybrid work schedule with 4 days onsite. Projects vary depending on development cycles and individual interests. You will gain exposure to a variety of IC design engineering skills and tools during your internship.
Requirements
- BSEE with coursework in Analog Circuit Design.
- Strong intuitive and analytical understanding of transistor-level design of analog circuits.
- Great communication skills and demonstration of teamwork and collaboration.
- Available to work full-time within 1-year of completing the internship.
Nice To Haves
- MSEE preferred
- Familiar with Cadence design environment
Responsibilities
- transistor level design
- power system modeling and analysis
- silicon measurement and characterization
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What This Job Offers
Job Type
Full-time
Career Level
Intern
Number of Employees
5,001-10,000 employees
