CPU Silicon Validation Engineer

Apple•Austin, TX

About The Position

At Apple, new ideas quickly become extraordinary products, services, and customer experiences. The company is committed to innovation in its products and practices, aiming to leave the world better than it was found. This role is central to a chip design effort, collaborating across disciplines to deliver functional products to millions of customers. The successful candidate will join a team responsible for the functional validation of CPUs, focusing on identifying logic design and circuit bugs. This involves developing CPU test content using test generators, defining new test cases for cutting-edge CPU designs, and leading silicon bring-up efforts.

Requirements

  • Minimum BS and 10+ years of relevant industry experience
  • Experience with CPU architecture
  • Experience in programming in C or C++ and scripting in Python or Perl

Nice To Haves

  • BS or MS in Electrical Engineering, Computer Science, or Computer Engineering
  • Understanding of CPU architecture including instruction sets, pipelines, caches, and memory subsystems
  • Understanding of low-level software, firmware and device drivers
  • Experience with assembly programming (ARM ISA is a plus)
  • Knowledge of operating system fundamentals including kernel execution, privilege levels, memory management, and virtual machines
  • Good understanding of the logic design and verification process
  • Background in silicon bring-up and system debug experience is a plus
  • Strong problem-solving skills

Responsibilities

  • Work closely with CPU RTL and DV teams to understand changes to our CPU designs and to engineer test content for new CPU features
  • Create CPU validation test plans, ensuring all key features are covered
  • Develop SW workloads to stress test the CPU and integrate these into our existing validation environments
  • Help maintain and improve our random test generator by adding support for new CPU architectural and microarchitectural features
  • Drive the bring-up and execution of our silicon validation tools in pre-silicon (FPGAs) and post-silicon (development boards)
  • Debug functional silicon failures closely with Design and DV counterparts
Ā© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service